1. Field of the Invention
The present invention relates to a semiconductor device used in a light-receiving circuit or the like in an optical data link, an optical CATV system, or the like.
2. Description of the Related Art
Conventionally, as a light-receiving circuit of this type, a circuit shown in FIG. 1 is known. A light signal is received by a light-receiving element 1, and is converted into a voltage signal by a resistor R.sub.L. The received signal converted into the voltage signal is input to a capacitor C.sub.C to remove its DC component. The output from the capacitor C.sub.C is amplified and demodulated by an amplifier 2. The resistor R.sub.L, the capacitor C.sub.C, and the amplifier 2 are formed on a signal integrated circuit (IC) chip 3. In general, the resistor R.sub.L has a resistance of about several hundreds of .OMEGA. to 10 k.OMEGA., and the DC cutoff capacitor C.sub.C has a capacitance of several pF to several hundreds of pF. A junction capacitance C.sub.PD of about 0.5 pF is formed in a p-n junction portion of the light-receiving element 1, a stray capacitance C.sub.CG for a ground potential is formed in the capacitor C.sub.C, and an input capacitance C.sub.IN is formed in an input section of the amplifier 2. High-and low-cutoff frequencies F.sub.H and F.sub.L are respectively given by: EQU F.sub.H =1/[2.pi.(R.sub.L //R.sub.IN).multidot.(C.sub.PD +C.sub.IN +C.sub.CG)] (1) EQU F.sub.L =1/[2.pi.(R.sub.L //R.sub.IN).multidot.C.sub.C ] (2)
where R.sub.IN is the input resistance of the amplifier 2, and the symbol "//" represents a parallel-synthesized resistance of resistances before and after this symbol.
However, in the arrangement of the conventional device, as can be understood from equation (1), if the resistance of the resistor R.sub.L is increased to increase reception sensitivity of the circuit, an S/N ratio as a ratio of signal to noise is increased, and the sensitivity can be improved. However, the high-cutoff frequency F.sub.H is undesirably decreased. When the resistance of the resistor R.sub.L is constant, the smaller a value of (C.sub.PD +C.sub.IN +C.sub.CG) becomes, the higher the high-cutoff frequency F.sub.H becomes.
As can be understood from equation (2), in order to decrease the low-cutoff frequency F.sub.L, when the resistance of the resistor R.sub.L is constant, the capacitance of the DC cut capacitor C.sub.C must be increased. For this reason, in a chip pattern inside the IC chip 2 shown in FIG. 2, a chip pattern 4 of the capacitor C.sub.C occupies a large area in the entire pattern area. Therefore, the stray capacitance C.sub.CG formed between the chip pattern 4 and a ground pattern (not shown) formed on the entire back surface of the IC chip 3 is increased, and the high-cutoff frequency F.sub.H is undesirably decreased. When the capacitance of the capacitor C.sub.C is decreased to decrease the stray capacitance C.sub.CG, the low-cutoff frequency F.sub.L is increased, and jitter components are increased.
As another conventional light-receiving circuit, a bootstrap type circuit shown in FIG. 3 is also known. A light signal is received by a light-receiving element 5 which is boosted to a power supply potential by a resistor R.sub.Q, and the received signal is then converted into a voltage signal by a resistor R.sub.L. The received signal converted into the voltage signal is input to a capacitor C.sub.C to remove a DC component therefrom. The output from the capacitor C.sub.C is supplied to a buffer amplifier 6 having a gain of 1. The output from the buffer amplifier 6 is fed back to the light-receiving element 5 via a capacitor C.sub.Q. At the same time, the output from the buffer amplifier 6 is supplied to an amplifier 7, and then is amplified and demodulated by the amplifier 7. The resistor R.sub.L and R.sub.Q, the capacitors C.sub.C and C.sub.Q, and the amplifiers 6 and 7 are formed on a single integrated circuit (IC) chip 8, and the light-receiving element 5 is formed into a pattern of a carrier chip 9.
In general, the resistor R.sub.L has a resistance of about several hundreds of .OMEGA. to 10 k.OMEGA., and the DC cutoff capacitor C.sub.C has a capacitance of several pF to several hundreds of pF. A junction capacitance C.sub.PD of about 0.5 pF is formed in a p-n junction of the light-receiving element 5. When the light-receiving element 5 is mounted on a circuit board, ground-capacitances C.sub.1 and C.sub.2 are formed in a cathode-ground path and an anode-ground path of the light-receiving element 5.
FIG. 4 shows frequency characteristics of reception signals having values of the ground-capacitances C.sub.1 and C.sub.2 as parameters. A frequency [Hz] is plotted along the abscissa, and an attenuation amount [dB] of a reception signal is plotted along the ordinate. Note that the characteristics are obtained as a result of simulations. Curves 10, 11, 12, and 13 respectively represent frequency characteristics when ground-capacitances C.sub.1 (=C.sub.2) are 0 pF, 0.05 pF, 0.1 pF, and 0.2 pF, respectively. As can be understood from the curve 10, when the ground-capacitance is 0 pF, a signal can be received over a very wide frequency range. However, even if a very small ground-capacitance of about 50 fF or 100 fF indicated by the curve 11 or 12 is generated in the light-receiving element 5, the reception frequency bandwidth of the light-receiving circuit is considerably narrowed.
For this reason, in a high-speed, wide-range light-receiving circuit, no can type package is employed for the light-receiving element 5 but a chip carrier type package shown in FIG. 5 is employed to reduce the ground-capacitances C.sub.1 and C.sub.2. In the light-receiving element of this type, terminals 14 and 15 formed by metallizing a metal are formed on a ceramic substrate 16, and a light-receiving section 17 is formed on the terminal 14 located at the central portion of the substrate. The terminal 14 corresponds to the cathode, and the terminal 15 corresponds to the anode. A surface 16a of the ceramic substrate 16 is a mounting surface to a circuit board, and the dimensions of this package are normally about 2 mm.times.2 mm.times.4 mm. The ground-capacitance in the light-receiving element of the chip carrier type is smaller by 0.5 pF or more than that of a light-receiving element of a can type package.
However, even in the chip carrier type light-receiving element, the ground-capacitances C.sub.1 and C.sub.2 cannot be sufficiently reduced, as will be described in detail below.
FIG. 6 partially shows a pattern of a light-receiving circuit board 18 constituted by using the carrier chip 9 shown in FIG. 5. A preamplifier, a main amplifier, and the like (not shown) are mounted on this circuit board 18, and a ground pattern which is set at a reference potential of the mounted circuit is formed on the back surface of the circuit board 18. The surface 16a of the carrier chip 9 is in contact with the upper surface of the circuit board 18, and the terminals 14 and 15 are electrically connected to conductive patterns 19 and 20 by bonding. The conductive patterns 19 and 20 are connected to a preamplifier circuit, and are formed to have slightly larger areas than those of the terminals 14 and 15. When the carrier chip 9 is to be bonded to the circuit board 18, the excess areas are required as a margin for alignment.
More specifically, each of the terminals 14 and 15 on the surface 16a has a size of about 0.5 mm.times.2 mm, and the conductive patterns 19 and 20 are formed to be larger by 100 .mu.m than the contours of the terminals 14 and 15. More specifically, each of the conductive patterns 19 and 20 is formed to have a size of 0.7 mm.times.2.2 mm, and its area is 1.54 mm.sup.2. The ground-capacitances C.sub.1 and C.sub.2 are formed between the conductive patterns 19 and 20 and the ground pattern formed on the back surface of the circuit board 18. When a normally used 635-.mu.m thick ceramic circuit board is used as the circuit board 18, the ground-capacitances C.sub.1 and C.sub.2 are calculated as follows: ##EQU1##
Note that "8.854.times.10.sup.-12 " is the vacuum permittivity, and "9" is the dielectric constant of ceramic. When the light-receiving element of the chip carrier type is used, the ground-capacitances C.sub.1 and C.sub.2 of about 200 fF are generated. For this reason, the light-receiving element has frequency characteristics, as indicated by the curve 13 in FIG. 4, and the reception bandwidth is narrowed.